One class of power amplifiers that perform with high efficiency are those that operate in a saturation mode. In many communication systems using frequency modulation (e.g. FSK), amplifiers are operated at or near their most efficient point of operation since minimal amplitude variation in the output signal occurs. Unfortunately, as demand grows for increased transmitted data bandwidth within each transmission channel, amplitude modulation is introduced into transmitted signals. With both frequency and amplitude modulation distortion becomes a more important figure of merit in respect of power amplifier performance. First, varying the signal power causes efficiency variations with which a varying output power signal is amplified. Second, because there is amplitude modulation, any variation in the ratio between input amplitude and output amplitude of a PA results in distortion, which renders receiving of the signal by a receiver more problematic. Furthermore, is can be appreciated that there are legislative requirements that govern how much distortion is allowed within adjacent transmission channels in a wireless communication system.
It is desirable to produce an amplitude varying transmit signal in an efficient fashion. Typically, most transmitter applications utilize linear amplifiers having lots of “head room,” for example, a PA is designed and biased to supply 30 dBm of amplification and is operated well below that point in a so-called ‘linear’ regime of operation. Performance is thereby improved at the expense of efficiency. Thus a need exists to amplify an amplitude-varying signal for transmission in a more efficient manner.
One method of increasing the efficiency in such an amplifier is by increasing the control circuitry complexity to vary more amplifier parameters in order to maintain near optimal efficiency for any and all amplification requirements. The downside to doing so is that if the control system for controlling the PA is too complicated then it consumes more power and semi-conductor die area. It is also well appreciated by the semiconductor power amplifier designers that power amplifier control schemes can lead to problems with the stability of the amplifier. Often an amplifier with a complex control loop will oscillate at some frequencies. Generally speaking, control systems for controlling the add cost and, as the complexity of the control circuit increases, the power savings diminish.
Another approach utilizes a plurality of PAs driven in parallel with a phase of an input signal provided to each of the PAs in phase one with another. A power combiner is coupled to the output ports of each of the PAs to combine output signals therefrom using a vector sum, providing amplitude modulation by controlling the phase angle in order to obtain the amplitude modulation that is desired. However, efficiency of such an amplifier suffers because when combining the output signals, output power is wasted even though the parallel PAs are operated at full power.
In typical transmitter systems, transmitter signal generators generate a modulated signal at a known carrier frequency for transmission at a known power level using two separate circuits, a modulation circuit and a power amplifier circuit (PA). The modulation circuit is for generating of a modulated signal, or RF signal, and then the PA is used to amplify the modulated signal to the known power level. Typically it is the PA that consumes a majority of power for the signal generator and, as such, PA efficiency is of significant concern. The PA circuit is typically implemented using any of a number of different transistor manufacturing technologies, such as GaAs, Si bipolar, SiGe bipolar, LDMOS and CMOS FET. Though the CMOS FET technology enables implementation of reasonable nonlinear PA circuits, it has yet to demonstrate efficiency when used for implementing of linear power amplifier circuits. The GaAs, SiGe and Si bipolar devices produce excellent linear PAs, but they are not always manufacturable with a state of the art CMOS process.
GaAs and other group III-V materials have yet to be integrated into a high density CMOS process so a single chip solution incorporating both the signal processing elements and amplifying elements is not yet practical using mixed technology platforms. Unfortunately, state of the art CMOS linear power amplifiers do not have high efficiency operation, primarily due to the high transistor saturation voltage. This prevents these PAs from being accepted in the market for many common RF applications because they result in significantly reduced battery life for portable devices.
On the other hand, CMOS switch-class PAs, can operate with constant amplitude envelope signals quite efficiently for some applications. Unfortunately, CMOS switched PAs do not have power control supporting sufficient power control range for CDMA applications. Power control for CMOS switched PAs is often achieved by reducing the drain to source terminal voltage (Vds) for the FET therein. This reduction in Vds provides approximately 30 dB of power control, whereas CDMA and WCDMA applications require in excess of 60 dB power control.
For efficient operation in transmitter circuits, polar transmitter circuits are utilized, where the amplitude modulation is applied directly to the PA through collector/drain voltage control and or bias control. Primarily this approach relies on predictable amplitude and phase response through the PA over a wide range of output signal powers. Alternatively, this approach relies on amplitude and phase compensation circuits being used to compensate for imperfections. Unfortunately, it is well appreciated by those skilled in the art that the known compensation circuits consume power and increase the cost of the transmitter. Furthermore, there is significant demand to integrate signal generator circuits into a single IC, which is difficult with the above noted architecture.
It is conceivable that a PA circuit could be integrated with the modulation circuit using a SiGe technology, but this has yet to be achieved in a market acceptable form and is considered difficult with CMOS devices. A need therefore exists to integrate the signal generator including the modulation circuit and the PA circuit in a single semiconductor die using a CMOS process.
It is therefore an object of the invention to provide an efficient CMOS power amplifier that can be integrated with a modulation circuit to form a complete integrated signal generator circuit.